1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a thin-film transistor in a liquid crystal display device and a method for fabricating the same in which an on-current of the thin-film transistor can be enhanced and an off-current thereof can be reduced by using a thin-film transistor having a dual gate structure.
2. Description of the Related Art
With the development of information society, a demand has been gradually increased for various types of display devices, and accordingly, in recent years, various flat-panel display devices have been studied such as a liquid crystal device (LCD), a plasma display pane (PDP), an electro luminescent display (ELD), a vacuum fluorescent display (VFD), and the like, and some of them have been already used as a display device in various equipment units.
Among these flat panel display devices, LCD devices are most widely used for mobile image display devices in place of CRT monitors due to their characteristics and advantages such as excellent display quality, light weight, thin profile, low power consumption, and the like. Also, such LCD devices have been developed in various ways for a monitor of television sets and computers, which can receive and display broadcasting signals, as well as a mobile display device such as a monitor of notebook computers.
In general, a liquid crystal display device is largely classified into a liquid crystal panel for displaying an image and a driving unit for applying a drive signal to the liquid crystal panel, in which the liquid crystal panel is configured with a first and a second glass substrates attached to each other with a predetermined space therebetween, and a liquid crystal layer injected between the first and the second glass substrates.
Here, the first glass substrate (TFT array substrate) is formed with a plurality of gate lines arranged at a predetermined distance from each other in one direction, a plurality of data lines arranged at a predetermined distance from each other in a direction perpendicular to each of the gate lines, a plurality of pixel electrodes being formed in a matrix type arrangement at each of the pixel regions defined by crossing the data lines and the gate lines with each other, and a plurality of thin-film transistors being switched by a signal of the gate line to transmit a signal of the data line to each of the pixel electrodes.
Furthermore, the second glass substrate (color filter substrate) is formed with a light-shielding layer for blocking light from a portion excluding the pixel region, a RGB color filter layer for displaying colors, and a common electrode for forming an image.
In addition, the first and the second substrates are adhered to each other by a seal member having liquid crystal injection ports arranged with a predetermined space therebetween by a spacer.
A thin-film transistor in a liquid crystal display device having the foregoing construction according to the related art includes a gate electrode, a gate insulation film, an active layer, and source/drain electrodes, and it will be described below in accordance with FIG. 1.
FIG. 1 is a cross-sectional view schematically illustrating a thin-film transistor provided in a liquid crystal display device according to the related art.
Referring to FIG. 1, a thin-film transistor in a liquid crystal display device according to the related art includes a gate electrode 13 formed on an insulating substrate 11, a gate insulation film 15 formed at a front surface of the insulating substrate 11 including the gate electrode 13, an active layer 17 formed on the gate insulation film 15 being overlapped with the gate electrode 13, source/drain electrodes 21a and 21b formed on the active layer 17 in both sides of the gate electrode 13, a protective film 23 formed at a front surface of the substrate including the source/drain electrodes 21a and 21b. 
Here, the gate electrode 13 is vertically formed to be extended from a gate line (not shown), and the source electrode 21a is vertically formed to be extended from a data line (not shown), which is arranged to be crossed with the gate line (not shown).
Furthermore, the active layer 17 is an amorphous semiconductor layer used as a channel layer, and an ohmic contact layer 19, made of an amorphous silicon layer in which impurities are doped, is formed thereon.
Furthermore, though not shown in the drawing, the drain electrode 21b is connected to a pixel electrode (not shown) through a contact hole (not shown) formed on the protective film 23.
A method of fabricating a thin-film transistor in a liquid crystal display device having the foregoing construction according to the related art will be described below in accordance with FIG. 1.
Referring to FIG. 1, a gate electrode 13 is formed by depositing a metal film on a insulating substrate (thin-film transistor array substrate) 11, and selectively removing the metal film through a photo and etching process.
Next, a gate insulation film 15 is formed by depositing an inorganic insulation material such as a silicon nitride film on the insulating substrate 11 including the gate electrode 13.
Subsequently, an active layer 17 and an ohmic contact layer 19 are formed by sequentially depositing an amorphous silicon layer and an amorphous silicon layer doped with impurities on the gate insulation film 15, and then selectively removing the amorphous silicon layer and the amorphous silicon layer doped with impurities through a photo and etching process.
Next, source/drain electrodes 21a and 21b, which are apart from each other with a predetermined distance on the active layer 17 and the gate insulation film 15 in both sides of the gate electrode 13, are formed by depositing a metal film at a front surface of the substrate including the ohmic contact layer 19 and the active layer 17, and then selectively removing the metal film through a photo and etching process.
Subsequently, an interlayer insulating film 23 is formed by depositing an inorganic insulation material such as a silicon nitride film at a front surface of the substrate including the source/drain electrodes 21a and 21b. 
Next, though not shown in the drawing, a contact hole (not shown) for exposing the drain electrode 21b is formed by selectively removing the 23 through a photo and etching process.
Subsequently, though not shown in the drawing, a pixel electrode (not shown), which is electrically connected to the drain electrode 21b through the contact hole (not shown), is formed by depositing a conductive transparent material on the interlayer insulating film 23 including the contact hole (not shown), and then selectively removing the deposited material.
However, according to a thin-film transistor in a liquid crystal display device and a method for fabricating the same according to the related art, there is a problem as follows.
A thin-film transistor in a liquid crystal display device and a fabrication method thereof according to the related art is proceeded with a fabrication process with a typical back channel etched (BCE) invert-staggered TFT structure, and thus it has an advantage of maximizing the fabrication yield through a simplified process using a 4-mask process, but it is difficult to control an off-current due to contamination of a back channel, as well as difficult to control a threshold voltage. In other words, it may produce a large distribution of off-currents and reduce electron mobility based on the back channel process conditions, thereby decreasing on-current.
Specifically, in case of a gate-in-panel (GIP) type liquid crystal display device in which a driving IC is inserted into a panel, unlike a TFT in an active array unit, a TFT in a GIP circuit unit has a large channel width and thus it is not easy to control a threshold voltage (Vth) and the characteristics of threshold voltage (Vth) and off-current (Ioff) in the circuit unit is unavoidably deteriorated when performing an optimization on the element performance for the TFT performance required by the active array unit. Furthermore, in a thin-film transistor according to the related art, a channel is formed only to the one side in which a gate is located, and thus it is disadvantageous in the aspect of an on-current.